ATtiny167 16MHZ 1 RELEASED $1E $94 $87 [LOW:HIGH:EXTENDED] 46 8 0x80 0x00 Divide clock by 8 internally; [CKDIV8=0] 0x40 0x00 Clock output on PORTB5; [CKOUT=0] 0x3F 0x00 Ext. Clock - XTAL1; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0000 SUT=00] 0x3F 0x10 Ext. Clock - XTAL1; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0000 SUT=01] 0x3F 0x20 Ext. Clock - XTAL1; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; [CKSEL=0000 SUT=10] 0x3F 0x02 Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0010 SUT=00] 0x3F 0x12 Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0010 SUT=01] 0x3F 0x22 Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; [CKSEL=0010 SUT=10]; default value 0x3F 0x03 WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0011 SUT=00] 0x3F 0x13 WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0011 SUT=01] 0x3F 0x23 WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; [CKSEL=0011 SUT=10] 0x3F 0x04 Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK 4 ms; [CKSEL=0100 SUT=00] 0x3F 0x14 Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK + 64 ms; [CKSEL=0100 SUT=01] 0x3F 0x24 Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32768 CK + 64 ms; [CKSEL=0100 SUT=10] 0x3F 0x08 Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1000 SUT=00] 0x3F 0x18 Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1000 SUT=01] 0x3F 0x28 Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms; [CKSEL=1000 SUT=10] 0x3F 0x38 Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms; [CKSEL=1000 SUT=11] 0x3F 0x09 Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms; [CKSEL=1001 SUT=00] 0x3F 0x19 Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms; [CKSEL=1001 SUT=01] 0x3F 0x29 Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms; [CKSEL=1001 SUT=10] 0x3F 0x39 Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms; [CKSEL=1001 SUT=11] 0x3F 0x0A Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1010 SUT=00] 0x3F 0x1A Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1010 SUT=01] 0x3F 0x2A Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms; [CKSEL=1010 SUT=10] 0x3F 0x3A Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms; [CKSEL=1010 SUT=11] 0x3F 0x0B Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms; [CKSEL=1011 SUT=00] 0x3F 0x1B Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms; [CKSEL=1011 SUT=01] 0x3F 0x2B Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms; [CKSEL=1011 SUT=10] 0x3F 0x3B Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms; [CKSEL=1011 SUT=11] 0x3F 0x0C Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1100 SUT=00] 0x3F 0x1C Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1100 SUT=01] 0x3F 0x2C Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms; [CKSEL=1100 SUT=10] 0x3F 0x3C Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms; [CKSEL=1100 SUT=11] 0x3F 0x0D Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms; [CKSEL=1101 SUT=00] 0x3F 0x1D Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms; [CKSEL=1101 SUT=01] 0x3F 0x2D Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms; [CKSEL=1101 SUT=10] 0x3F 0x3D Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms; [CKSEL=1101 SUT=11] 0x3F 0x0E Ext. Ceramic Res.; Frequency 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1110 SUT=00] 0x3F 0x1E Ext. Ceramic Res.; Frequency 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1110 SUT=01] 0x3F 0x2E Ext. Ceramic Res.; Frequency 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms; [CKSEL=1110 SUT=10] 0x3F 0x3E Ext. Ceramic Res.; Frequency 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms; [CKSEL=1110 SUT=11] 0x3F 0x0F Ext. Ceramic Res.; Frequency 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms; [CKSEL=1111 SUT=00] 0x3F 0x1F Ext. Crystal Osc.; Frequency 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms; [CKSEL=1111 SUT=01] 0x3F 0x2F Ext. Crystal Osc.; Frequency 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms; [CKSEL=1111 SUT=10] 0x3F 0x3F Ext. Crystal Osc.; Frequency 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms; [CKSEL=1111 SUT=11] CKSEL0 Select Clock source 0 CKSEL1 Select Clock source 1 CKSEL2 Select Clock source 0 CKSEL3 Select Clock source 0 SUT0 Select start-up time 0 SUT1 Select start-up time 1 CKOUT Clock Output Enable 1 CKDIV8 Divide clock by 8 0 13 8 0x80 0x00 Reset Disabled (Enable PB7 as i/o pin); [RSTDISBL=0] 0x40 0x00 Debug Wire enable; [DWEN=0] 0x20 0x00 Serial program downloading (SPI) enabled; [SPIEN=0] 0x10 0x00 Watch-dog Timer always ON; [WDTON=0] 0x08 0x00 Preserve EEPROM memory through the Chip Erase cycle; [EESAVE=0] 0x07 0x04 Brown-out detection level at VCC=4.3 V; [BODLEVEL=100] 0x07 0x05 Brown-out detection level at VCC=2.7 V; [BODLEVEL=101] 0x07 0x06 Brown-out detection level at VCC=1.8 V; [BODLEVEL=110] 0x07 0x03 Brown-out detection level at VCC=2.3 V; [BODLEVEL=011] 0x07 0x02 Brown-out detection level at VCC=2.2 V; [BODLEVEL=010] 0x07 0x01 Brown-out detection level at VCC=1.9 V; [BODLEVEL=001] 0x07 0x00 Brown-out detection level at VCC=2.0 V; [BODLEVEL=000] 0x07 0x07 Brown-out detection disabled; [BODLEVEL=111] BODLEVEL0 Brown-out Detector trigger level 1 BODLEVEL1 Brown-out Detector trigger level 1 BODLEVEL2 Brown-out Detector trigger level 1 EESAVE EEPROM memory is preserved through the Chip Erase 1 WDTON Watchdog Timer always ON 1 SPIEN Enable Serial Program and Data Downloading 0 DWEN DebugWIRE Enable 1 RSTDISBL External Reset disable 1 SELFPRGEN Self-Programming Enable 1 1 1 0x01 0x00 Self Programming enable; [SELFPRGEN=0] [LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB1 = 0 : LB2 = 0] Same as previous, but verify is also disabled 3 2 0x03 0x03 Mode 1: No memory lock features enabled 0x03 0x02 Mode 2: Further programming disabled 0x03 0x00 Mode 3: Further programming and verification disabled LB1 Lockbit LB2 Lockbit [SOIC] 20 [RXLIN:RXD:ADC0:PCINT0:PA0] RXLIN (LIN Receive Pin). RXD (UART Receive Pin). ADC0 (ADC Input Channel 0). PCINT0 (Pin Change Interrupt 0). PORTA0. [TXLIN:TXD:ADC1:PCINT1:PA1] TXLIN (LIN Transmit Pin). RXD (UART Receive Pin). ADC0 (ADC Input Channel 0). PCINT0 (Pin Change Interrupt 0). PORTA1. [MISO:DO:OC0A:ADC2:PCINT2:PA2] MISO (SPI Master Input / Slave Output). DO (Three-wire Mode USI Alternate Data Output). OC0A (Output Compare and PWM Output A for Timer/Counter0). ADC2 (ADC Input Channel 2). PCINT2 (Pin Change Interrupt 2). PORTA2. [INT1:ISRC:ADC3:PCINT3:PA3] INT1 (External Interrupt1 Input). ISRC (Current Source Pin). ADC3 (ADC Input Channel 3). PCINT3 (Pin Change Interrupt 3). PORTA3. [AVCC] Analog Supply Voltage. [AGND] Analog Ground. [MOSI:SDA:DI:ICP1:ADC4:PCINT4:PA4] MOSI (SPI Master Output / Slave Input). SDA (Two-wire Mode USI Alternate Data Input / Output). DI (Three-wire Mode USI Alternate Data Input).ICP1 (Timer/Counter1 Input Capture Trigger). ADC4 (ADC Input Channel 4). PCINT4 (Pin Change Interrupt 4). PORTA4. [SCK:SCL:USCK:T1:ADC5:PCINT5:PA5] SCK (SPI Master Clock). SCL (Two-wire Mode USI Alternate Clock Input). USCK (Three-wire Mode USI Alternate Clock Input). T1 (Timer/Counter1 Clock Input). ADC5 (ADC Input Channel 5). PCINT5 (Pin Change Interrupt 5). PORTA5. [SS:AIN0:ADC6:PCINT6:PA6] SS (Active Low SPI Slave Select Input). AIN0 (Analog Comparator Negative Input). ADC6 (ADC Input Channel 6). PCINT6 (Pin Change Interrupt 6). PORTA6. [AREF:XREF:AIN1:ADC7:PCINT7:PA7] AREF (External Voltage Reference Input). XREF (Internal Voltage Reference Output). AIN1 (Analog Comparator Positive Input). ADC7 (ADC Input Channel 7). PCINT7 (Pin Change Interrupt 7). PORTA7. [dW:RESET:OC1BX:ADC10:PCINT15:PB7] dW (debugWIRE I/O). RESET (Active Low Reset pin). OC1BX (Output Compare and PWM Output B-X for Timer/Counter1). ADC10 (ADC Input Channel 10). PCINT15 (Pin Change Interrupt 15). PORTB7. [INT0:OC1AX:ADC9:PCINT14:PB6] INT0 (External Interrupt0 Input). OC1AX (Output Compare and PWM Output A-X for Timer/Counter1). ADC9 (ADC Input Channel 9). PCINT14 (Pin Change Interrupt 14). PORTB6. [CLKO:XTAL2:OC1BW:ADC8:PCINT13:PB5] CLKO (System clock output). XTAL2 (Chip clock Oscillator pin 2). OC1BW (Output Compare and PWM Output B-W for Timer/Counter1). ADC8 (ADC Input Channel 8). PCINT13 (Pin Change Interrupt 13). PORTB5. [CLKI:XTAL1:OC1AW:PCINT12:PB4] CLKI (External clock input). XTAL1 (Chip clock Oscillator pin 1). OC1AW (Output Compare and PWM Output A-W for Timer/Counter1). PCINT12 (Pin Change Interrupt 12). PORTB4. [VCC] Supply Voltage. [GND] Ground. [OC1BV:PCINT11:PB3] OC1BV (Output Compare and PWM Output B-V for Timer/Counter1). PCINT11 (Pin Change Interrupt 11). PORTB3. [SCL:USCK:OC1AV:PCINT10:PB2] SCL (Two-wire Mode USI Default Clock Input). USCK (Three-wire Mode USI Default Clock Input). OC1AV (Output Compare and PWM Output A-V for Timer/Counter1). PCINT10 (Pin Change Interrupt 10). PORTB2. [DO:OC1BU:PCINT9:PB1] DO (Three-wire Mode USI Default Data Output). OC1BU (Output Compare and PWM Output B-U for Timer/Counter1). PCINT9 (Pin Change Interrupt 9). PORTB1. [SDA:DI:OC1AU:PCINT8:PB0] SDA (Two-wire Mode USI Default Data Input / Output). DI (Three-wire Mode USI Default Data Input). OC1AU (Output Compare and PWM Output A-U for Timer/Counter1). PCINT8 (Pin Change Interrupt 8). PORTB0. 0xff,0xdf 1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface! 1,0x40,0x00,WARNING! Enabling the debugWIRE interface will disable the ISP interface! 1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible! 1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface! 1,0x40,0x00,WARNING! Enabling the debugWIRE interface will disable the ISP interface! 1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible! 2 5 1 4 0x00,8.0 MHz 16384 512 128 4 9 15 50 9 9 100 0x50000000 0x58080000 0x50080000 3 0xaca00000 0xaca80000 0xaca40000 3 0x58000000 3 0xace00000 3 0xfedf62 0x1dfff