AT90SCR100H 20MHZ 1 RELEASED $1E $96 $C1 [LOW:HIGH:EXTENDED] 5 CKOUT Clock output 1 SUT1 Select start-up time 1 SUT0 Select start-up time 0 CKSEL3 Clock Selection 1 CKSEL0 Clock Selection 1 12 0x39 0x08 Low Power Crystal Osc., Start-up time: 14 CK + 4.1 ms [CKSEL=10 SUT=00] 0x39 0x18 Low Power Crystal Osc., Start-up time: 14 CK + 65 ms [CKSEL=10 SUT=01] 0x39 0x28 Low Power Crystal Osc., Start-up time: 14 CK [CKSEL=10 SUT=10] 0x39 0x38 Low Power Crystal Osc., Start-up time: 14 CK + 4.1 ms [CKSEL=10 SUT=11] 0x39 0x09 Low Power Crystal Osc., Start-up time: 14 CK + 65 ms [CKSEL=11 SUT=00] 0x39 0x19 Low Power Crystal Osc., Start-up time: 14 CK [CKSEL=11 SUT=01] 0x39 0x29 Low Power Crystal Osc., Start-up time: 14 CK + 4.1 ms [CKSEL=11 SUT=10] 0x39 0x39 Low Power Crystal Osc., Start-up time: 14 CK + 65 ms [CKSEL=11 SUT=11] 0x38 0x08 External Clock, Start-up time: 14 CK [CKSEL=1X SUT=00] 0x38 0x18 External Clock, Start-up time: 14 CK + 4.1 ms [CKSEL=1X SUT=01] 0x38 0x08 External Clock, Start-up time: 14 CK + 65 ms [CKSEL=1X SUT=10] 0x40 0x00 Clock output on PORTB1; [CKOUT=0] 8 OCDEN Enable OCD 1 JTAGEN Enable JTAG 0 SPIEN Enable Serial programming and Data Downloading 0 WDTON Watchdog timer always on 1 EESAVE EEPROM memory is preserved through chip erase 1 BOOTSZ1 Select Boot Size 0 BOOTSZ0 Select Boot Size 0 BOOTRST Select Reset Vector 1 10 0x80 0x00 On-Chip Debug Enabled; [OCDEN=0] 0x40 0x00 JTAG Interface Enabled; [JTAGEN=0] 0x20 0x00 Serial program downloading (SPI) enabled; [SPIEN=0] 0x10 0x00 Watchdog timer always on; [WDTON=0] 0x08 0x00 Preserve EEPROM memory through the Chip Erase cycle; [EESAVE=0] 0x06 0x06 Boot Flash section size=512 words Boot start address=$7E00; [BOOTSZ=11] 0x06 0x04 Boot Flash section size=1024 words Boot start address=$7C00; [BOOTSZ=10] 0x06 0x02 Boot Flash section size=2048 words Boot start address=$7800; [BOOTSZ=01] 0x06 0x00 Boot Flash section size=4096 words Boot start address=$7000; [BOOTSZ=00] ; default value 0x01 0x00 Boot Reset vector Enabled (default address=$0000); [BOOTRST=0] 1 BODENABLE Brown-out Detector Enable Signal 1 2 0x01 0x01 Brown-out detection disabled [BODENABLE=0] 0x01 0x00 Brown-out detection enabled [BODENABLE=1] [LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB1 = 0 : LB2 = 0] Same as previous, but verify is also disabled 6 11 0x03 0x03 Mode 1: No memory lock features enabled 0x03 0x02 Mode 2: Further programming disabled 0x03 0x00 Mode 3: Further programming and verification disabled 0x0C 0x0C Application Protection Mode 1: No lock on SPM and LPM in Application Section 0x0C 0x08 Application Protection Mode 2: SPM prohibited in Application Section 0x0C 0x00 Application Protection Mode 3: LPM and SPM prohibited in Application Section 0x0C 0x04 Application Protection Mode 4: LPM prohibited in Application Section 0x30 0x30 Boot Loader Protection Mode 1: No lock on SPM and LPM in Boot Loader Section 0x30 0x20 Boot Loader Protection Mode 2: SPM prohibited in Boot Loader Section 0x30 0x00 Boot Loader Protection Mode 3: LPM and SPM prohibited in Boot Loader Section 0x30 0x10 Boot Loader Protection Mode 4: LPM prohibited in Boot Loader Section LB1 Lock bit LB2 Lock bit BLB01 Boot Lock bit BLB02 Boot Lock bit BLB11 Boot lock bit BLB12 Boot lock bit 0xff,0xdf 0xff,0xdf 1,0x40,0x40,WARNING! These fuse settings will disable the JTAG interface! 1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface! 1,0x40,0x40,WARNING! These fuse settings will disable the JTAG interface! 1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface! 1,0x40,0x40,WARNING! These fuse settings will disable the JTAG interface! 1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface! 2 5 1 4 0x00,8.0 MHz 128 4 65536 4096 9 15 50 9 9 100 0x50000000 0x58080000 0x50080000 3 0xaca00000 0xaca80000 0xaca40000 3 0x58000000 3 0xace00000 3 0xff9962 0xffffff